Verification Team Leader Position

6 days ago


Oulu, North Ostrobothnia, Finland Sony Semicon (IL) Full time
Designing the Future

Sony Semiconductor IL is on a mission to push the boundaries of innovation, connecting people and enabling new ways of experiencing the world. By harnessing the power of curiosity and passion, using cutting-edge technology, and working together, we drive progress every day.

We believe that our collective vision is built by individuals connected to one another. We create our own reality through daily effort – for an exciting future that we wish to live in.

Responsibilities:
  1. Lead a dynamic team developing the System-On-Chip for Sony Semiconductor IL's cutting-edge 5G IoT and AI products.
  2. Mentor and guide a team of verification engineers, ensuring the development of innovative and robust verification environments from block-level to chip-level.
  3. Drive the implementation of sophisticated verification methodologies for System-On-Chip flows.
  4. Collaborate closely with the design team and provide critical support to SW and production teams.
  5. Research and integrate cutting-edge industry technologies and standards across various fields such as communications, processors, and interconnect.
Requirements:
  1. Manage a team of verification engineers, providing direction, mentorship, and professional development.
  2. Oversee the development and improvement of verification environments, ensuring comprehensive coverage from block-level to chip-level.
  3. Implement and refine advanced verification methodologies in collaboration with the design team.
  4. Support SW and production teams, ensuring seamless integration and functionality of the System-On-Chip.
  5. Conduct research on industry technologies and standards, integrating best practices and innovative solutions into the verification process.
  6. Foster a collaborative team environment, promoting proactive attitudes and independent thinking.
Qualifications:
  1. Bachelor's degree in Electrical or Computer Engineering/Computer Science from an established university.
  2. At least 6 years of experience in the verification flow of complex designs from test plan definition to coverage closure.
  3. Strong understanding of high-level system flows and constraints.
  4. Proven experience with Specman and/or System Verilog.
  5. Demonstrated leadership skills with the ability to mentor and guide a team.
  6. Independent thinker, curious, and motivated.
  7. Excellent communication and collaboration skills.
Nice to Have:
  1. Experience in UVM.
  2. Background in System-On-Chip flows and on-chip interconnect protocols.


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